34 lines
863 B
Markdown
34 lines
863 B
Markdown
# Interrupts (1)
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## ARMv7-M Interrupt Handling
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* 1 NMI supported
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* Up to 511(496 external, 15 internal) prioritizable interrupts/exceptions supported
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* NVIC is highly coupled with processor
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## ISR Vector Table
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## Interrupt Handling Process
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1. start `main`
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1. if interrupt signal detects
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2. processor stops `main`
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3. auto stacking `PUSH {r0 ... r3, r12, lr, pc, psr}`
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2. `pc = memory address of SysTick_Handler`
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3. execute ISR
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4. Interrupt Returns. Active bits will be cleared
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1. Auto unstacking `POP {r0 ... r3, r12, lr, pc, psr}`
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5. continue `main`
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### Stacking and Unstacking
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When Interrupts, it automatically **stacking** `r0`, `r1`, `r2`, `r3`, `r12`, `lr`, `pc`, `psr`.
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When Exiting Interrupts, it automatically **unstacking** `r0`, `r1`, `r2`, `r3`, `r12`, `lr`, `pc`, `psr`.
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It is done by hardware, not software.
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## Exception Exits
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