add initial labs
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138
labs/lab_w4/msp432p401r.cmd
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138
labs/lab_w4/msp432p401r.cmd
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/******************************************************************************
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*
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* Copyright (C) 2012 - 2017 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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*
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* Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Default linker command file for Texas Instruments MSP432P401R
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*
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* File creation date: 12/06/17
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*
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*****************************************************************************/
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/* Suppress warnings and errors: */
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/* #10199-D CRC table operator (crc_table_for_<>) ignored:
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CRC table operator cannot be associated with empty output section */
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--diag_suppress=10199
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--retain=flashMailbox
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MEMORY
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{
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MAIN (RX) : origin = 0x00000000, length = 0x00040000
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INFO (RX) : origin = 0x00200000, length = 0x00004000
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#ifdef __TI_COMPILER_VERSION__
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#if __TI_COMPILER_VERSION__ >= 15009000
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ALIAS
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{
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SRAM_CODE (RWX): origin = 0x01000000
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SRAM_DATA (RW) : origin = 0x20000000
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} length = 0x00010000
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#else
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/* Hint: If the user wants to use ram functions, please observe that SRAM_CODE */
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/* and SRAM_DATA memory areas are overlapping. You need to take measures to separate */
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/* data from code in RAM. This is only valid for Compiler version earlier than 15.09.0.STS.*/
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SRAM_CODE (RWX): origin = 0x01000000, length = 0x00010000
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SRAM_DATA (RW) : origin = 0x20000000, length = 0x00010000
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#endif
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#endif
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}
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/* The following command line options are set as part of the CCS project. */
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/* If you are building using the command line, or for some reason want to */
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/* define them here, you can uncomment and modify these lines as needed. */
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/* If you are using CCS for building, it is probably better to make any such */
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/* modifications in your CCS project and leave this file alone. */
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/* */
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/* A heap size of 1024 bytes is recommended when you plan to use printf() */
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/* for debug output to the console window. */
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/* */
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/* --heap_size=1024 */
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/* --stack_size=512 */
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/* --library=rtsv7M4_T_le_eabi.lib */
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/* Section allocation in memory */
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SECTIONS
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{
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#ifndef gen_crc_table
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.intvecs: > 0x00000000
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.text : > MAIN
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.const : > MAIN
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.cinit : > MAIN
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.pinit : > MAIN
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.init_array : > MAIN
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.binit : {} > MAIN
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/* The following sections show the usage of the INFO flash memory */
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/* INFO flash memory is intended to be used for the following */
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/* device specific purposes: */
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/* Flash mailbox for device security operations */
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.flashMailbox : > 0x00200000
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/* TLV table for device identification and characterization */
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.tlvTable : > 0x00201000
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/* BSL area for device bootstrap loader */
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.bslArea : > 0x00202000
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#else
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.intvecs: > 0x00000000, crc_table(crc_table_for_intvecs)
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.text : > MAIN, crc_table(crc_table_for_text)
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.const : > MAIN, crc_table(crc_table_for_const)
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.cinit : > MAIN, crc_table(crc_table_for_cinit)
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.pinit : > MAIN, crc_table(crc_table_for_pinit)
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.init_array : > MAIN, crc_table(crc_table_for_init_array)
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.binit : {} > MAIN, crc_table(crc_table_for_binit)
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/* The following sections show the usage of the INFO flash memory */
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/* INFO flash memory is intended to be used for the following */
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/* device specific purposes: */
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/* Flash mailbox for device security operations */
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.flashMailbox : > 0x00200000, crc_table(crc_table_for_flashMailbox)
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/* TLV table for device identification and characterization */
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/* This one is read only memory in flash - generate no CRC */
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.tlvTable : > 0x00201000
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/* BSL area for device bootstrap loader */
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.bslArea : > 0x00202000, crc_table(crc_table_for_bslArea)
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.TI.crctab : > MAIN
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#endif
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.vtable : > 0x20000000
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.data : > SRAM_DATA
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.bss : > SRAM_DATA
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.sysmem : > SRAM_DATA
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.stack : > SRAM_DATA (HIGH)
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#ifdef __TI_COMPILER_VERSION__
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#if __TI_COMPILER_VERSION__ >= 15009000
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.TI.ramfunc : {} load=MAIN, run=SRAM_CODE, table(BINIT)
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#endif
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#endif
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}
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/* Symbolic definition of the WDTCTL register for RTS */
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WDTCTL_SYM = 0x4000480C;
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